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The Challenge
The Challenge
While our lab's pioneering M2SPC topology (Goetz, 2014) introduced the benefits of parallel connectivity, its high component count presented a cost challenge. A next-generation "direction-selective" topology (Zhang, 2024) was designed to solve this but existed only as a theoretical model.
The Objective
The Objective
To provide the first experimental validation of this next-generation topology. This project involves constructing a hardware prototype and conducting rigorous testing to prove the performance of the more cost-effective topology.
Motivation & Background
Motivation & Background
In the summer of 2025, I joined the lab under the guidance of PHD Canidate Jinshui Zhang. He came up with the "direction-selective" topology before I arrived, and I began work validating and characterizing topology on the developed physical prototype. When completed, this will allow multilevel converter topology in both series and parallel configurations with a lower component count.
Key Testing Results/Setups
Key Testing Results/Setups
High-Voltage Pulse Characterization
High-Voltage Pulse Characterization
For each switch-diode half bridge, configuring as a buck-converter and applying pulses from a function generator, I was able to visualize the current and voltage curves of the output.
Switching Verification
Switching Verification
Before any load for and half-bridge, each board's power conversion and switching stage had to be verified.
Fabrication and Assembly
Fabrication and Assembly
Soldering the components to the board
Post-soldered board
To learn more about the research...
To learn more about the research...
... take a look at these papers written by my supervisors here.
Note: I did not write nor contribute to these publishings.
zhang2024direction.pdfgoetz2014modular.pdfPage updated
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